detectNativeCpuAndFeatures

pub fn detectNativeCpuAndFeatures() ?Target.Cpu {
    var file = fs.openFileAbsolute("/proc/cpuinfo", .{}) catch |err| switch (err) {
        else => return null,
    };
    defer file.close();

    var buffer: [4096]u8 = undefined; // "flags" lines can get pretty long.
    var file_reader = file.reader(&buffer);

    const current_arch = builtin.cpu.arch;
    switch (current_arch) {
        .arm, .armeb, .thumb, .thumbeb => {
            return ArmCpuinfoParser.parse(current_arch, &file_reader.interface) catch null;
        },
        .aarch64, .aarch64_be => {
            const registers = [12]u64{
                getAArch64CpuFeature("MIDR_EL1"),
                getAArch64CpuFeature("ID_AA64PFR0_EL1"),
                getAArch64CpuFeature("ID_AA64PFR1_EL1"),
                getAArch64CpuFeature("ID_AA64DFR0_EL1"),
                getAArch64CpuFeature("ID_AA64DFR1_EL1"),
                getAArch64CpuFeature("ID_AA64AFR0_EL1"),
                getAArch64CpuFeature("ID_AA64AFR1_EL1"),
                getAArch64CpuFeature("ID_AA64ISAR0_EL1"),
                getAArch64CpuFeature("ID_AA64ISAR1_EL1"),
                getAArch64CpuFeature("ID_AA64MMFR0_EL1"),
                getAArch64CpuFeature("ID_AA64MMFR1_EL1"),
                getAArch64CpuFeature("ID_AA64MMFR2_EL1"),
            };

            const core = @import("arm.zig").aarch64.detectNativeCpuAndFeatures(current_arch, registers);
            return core;
        },
        .sparc64 => {
            return SparcCpuinfoParser.parse(current_arch, &file_reader.interface) catch null;
        },
        .powerpc, .powerpcle, .powerpc64, .powerpc64le => {
            return PowerpcCpuinfoParser.parse(current_arch, &file_reader.interface) catch null;
        },
        .riscv64, .riscv32 => {
            return RiscvCpuinfoParser.parse(current_arch, &file_reader.interface) catch null;
        },
        else => {},
    }

    return null;
}